Here is the specification of the bits from opcodes.
* means “Can contain different values”
x means “Don't care”
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | Description | schema |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | * | * | * | * | * | * | * | * | * | * | Load/Store | |
| 1 | 1 | 0 | Address (8 bits) | Load A with content of Addr | A ← [addr] | |||||||
| 1 | 1 | 1 | Address (8 bits) | Load B with content of Addr | B ← [addr] | |||||||
| 1 | 0 | 0 | Address (8 bits) | Store Addr with content of A | [addr] ← A | |||||||
| 1 | 0 | 1 | Address (8 bits) | Store Addr with content of B | [addr] ← B | |||||||
| 0 | 0 | * | * | * | * | * | * | * | * | * | Load with Immediate value | |
| 0 | 0 | 0 | Immediate (8 bits) | Load A with Immediate | A ← Imm | |||||||
| 0 | 0 | 1 | Immediate (8 bits) | Load B with Immediate | B ← Imm | |||||||
| 0 | 1 | x | 0 | * | * | * | x | x | x | x | Tests of values into W | |
| 0 | 1 | x | 0 | 0 | 0 | 0 | x | x | x | x | ⇐0 | Status ← W =< 0 |
| 0 | 1 | x | 0 | 0 | 0 | 1 | x | x | x | x | XX | Illegal |
| 0 | 1 | x | 0 | 0 | 1 | 0 | x | x | x | x | <0 | Status ← W < 0 |
| 0 | 1 | x | 0 | 0 | 1 | 1 | x | x | x | x | != 0 | Status ← W != 0 |
| 0 | 1 | x | 0 | 1 | 0 | 0 | x | x | x | x | XX | Illegal |
| 0 | 1 | x | 0 | 1 | 0 | 1 | x | x | x | x | >0 | Status ← W > 0 |
| 0 | 1 | x | 0 | 1 | 1 | 0 | x | x | x | x | >=0 | Status ← W >= 0 |
| 0 | 1 | x | 0 | 1 | 1 | 1 | x | x | x | x | =0 | Status ← W = 0 |
| 0 | 1 | * | 1 | 0 | 1 | 0 | * | * | * | * | UAL work | |
| 0 | 1 | * | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | Load W | |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | Load W with A | W ← A |
| 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | Load W with B | W ← B |
| 0 | 1 | x | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | or A / B | W ← A or B |
| 0 | 1 | x | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | and A / B | W ← A and B |
| 0 | 1 | x | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | xor A / B | W ← A xor B |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | not A | W ← not A |
| 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | not B | W ← not B |
| 0 | 1 | x | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | add A / B | W ← A + B |
| 0 | 1 | x | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | sub A / B | W ← A – B |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | shl A | W ← A « 1 |
| 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | shl B | W ← B « 1 |
| 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | shr A | W ← A » 1 |
| 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | shr B | W ← B » 1 |
| 0 | 1 | x | 1 | * | * | * | * | * | * | * | IP management | |
| 0 | 1 | x | 1 | 1 | Address (6 bits) | Relative jump (extended addr) | IP ← IP + sign_extend(addr) | |||||
| 0 | 1 | x | 1 | 0 | 0 | 1 | 0 | x | x | x | Skip next instruction if Status | if(status): IP=IP+1 |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | x | x | x | IO from A | IO port ← A |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | x | x | x | IO from B | IO port ← B |